Brochures, Data Sheets, and Description Manuals

LC-1 Burn-In with Test System for Logic Devices
Data Sheet
Description Manual

ABES-V Burn-In with Test System for VLSI and Memory Devices
Description Manual
Brochure
Spec Sheet


HPB-4 Burn-In with Test System for VLSI Devices up to 600 W
Spec Sheet
Description Manual

HPB-5/HPB-5A Burn-In with Test System for VLSI Devices up to 35 W/150W
Spec Sheet
Brochure
Description Manual

HPB-5B Burn-In with Test System for VLSI Devices up to 150 W
Spec Sheet
Description Manual

Burn-In Boards
Data Sheet

Ovens And Chambers With Multi-Zone
Data Sheet

Electronic Manufacturing Services
Brochure

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Technical Application Notes

High-Power Burn-in

Sockets and Heat Sinks in High Power Burn-In
(Published in Evaluation Engineering magazine)
Challenges of High-Power Burn-In with Test
(Published in Evaluation Engineering magazine)
An Overview of High Power Burn-In with Test
(Published in Chipscale magazine)
Low Voltage/High Power Noise Considerations
Thermal Aspects of Burn-in for High Power Semiconductor Devices
High Power Burn-In for VLSI and Memory Devices up to 35 Watts - HPB-5
High Power Burn-In for VLSI and Memory Devices up to 150 Watts - HPB-5A
High Power Burn-In for VLSI and Memory Devices up to 150 Watts - HPB-5B
High Power Burn-In for VLSI and Memory Devices up to 600 Watts - HPB-4
High Power Burn-In for VLSI Devices up to 200 Watts - HPB-2
High Power Burn-In for VLSI Devices up to 20 Watts - HPB-1
Configuring the HPB-5 to Burn in and Test Your Logic and  Memory  Devices
Configuring the HPB-5A to Burn in and Test Your Logic and Memory  Devices
Socket and Heat Sink Selection for the HPB-5A/HPB-5B


Technology and Testing

Writing Memory Test Vectors Using the FCS Registers in MCC Test Systems
Flash Memory Cycling Testing in Micro Control Test Systems
Testing Flash Memory Erase and Program Algorithm Timing
Testing Complex Memory Devices on the ABES-V Test System
Design Guidelines for Burn-In Board Design for ABES-IV/IVD
Testing Memory Devices on the ABES-IV/IVD Test System
Testing Flash Memory Cards
ABES Memory Correlation
Testing Direct RDRAMs on the ABES Memory Test System
Pulse Requirements for High Performance Burn-In Test Systems
Design Guidelines for Memory Device Burn-In Boards
Testing SDRAMS with the ABES Memory Test System
A Massively Parallel Memory Device Testing Strategy - MPT-1

Background Information
Translating Simulator and Test System Files to the ABES-IIID (1994)
Testing Intel® 28F016SA (1994)
An Overview - VLSI Burn-In Considerations (1992)
ABCs of Selecting a Memory IC Burn-In System (1991)
Memory Device Burn-In Systems: An Overview (1990)
ATE Considerations for Board and System Test (1987)
VLSI Burn-In Systems (1987)
Combining Test with (1987)
Test of Logic Devices During Burn-In (1987)
Parallel Memory Testing (1984)
Evaluating Soft Errors in Memory Devices (1981)
Selecting a Memory Test System for Board and System Testing (1980)
Testing Logic on Memory Boards (1980)
Monitored Burn-In: An Overview (1980)
Standard Patterns for Testing Memories (1980) 
Memory Testing: Keeping Quality Up and Costs Down (1980) 
Introduction to Digital Testing (1979)  
Testing Memory Chips (1979)




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